Following the recent release of several candidate versions, the official version of GCC 11 is expected to be released next week. Currently, foreign media Phoenix is reading the GCC 11 (and LLVM Klang 12) compiler definitions to conduct a comprehensive test in the next few days after its official release. Features include the standard version of GCC 11.1
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++ Default C ++ mode has now been upgraded from C ++ 14 to GNU ++ 17 (C ++ 17)
CC GCC 11 now uses the DWARF version 5 debug info format by default.
2 All parts of the upcoming C2X language revision have been implemented and can be used with the “-std = c2x” switch.
C GCC 11 continued its support for C ++ 20, and additional functions are now being implemented. Libstdc ++ includes some C ++ 17 / C ++ 20 enhancements and C ++ 23 test work.
TS newly supported x86_64 commands are TSXLDTRK, SERIALIZE, HRESET, UINTR, KEYLOCKER, AMX-TILE / AMX-INT8 / AMX-BF16, and AVX-VNNI.
Mat incomparable displacement, string functional reading beyond the end of the queue is sent to them as a parameter, and unsupported ThreadSanitizer features, new alerts will be enabled by default.
Continue to support MP OpenMP 5.0 and OpenACC 2.6.
A The hardware support address currently found only on AArch64 is not suitable for purposes other than creating a Linux kernel.
GCC now requires a host compiler to handle C ++ 11, the previous requirement being C ++ 98.
S HSAIL’s BRIG format has been dropped from AMD’s front end, and they can be removed in GCC 12.
Lipkjit is now officially considered stable.
CP Officially supported hand CPUs now include the Cortex A78, A78AE, A78C, X1 and R82. Arm Newers V1 and Arm Newers N2 are now supported. Fujitsu A64FX is now supported. As for ARM, GCC can now use the advanced SIMD algorithms of ARCv8.3-A, SVE, SVE2 and MVE to perform automated orientation functions on complex numbers.
CC GCC 11 now allows you to mitigate Armin’s straight-line speculation using the “-morton-slush” option.
● AMD Radeon GCN backend now supports gfx908 backend, also known as AMD Instinct MI100.
GCC 11 in IS RISC-V now supports address clearance, IFUNC and other enhancements.
CC GCC’s standard analyzer has been updated.